David Anderson

David Anderson
david.anderson@ece.gatech.edu
ECE Profile Page

David V. Anderson received the B.S and M.S. degrees from Brigham Young University and the Ph.D. degree from Georgia Institute of Technology (Georgia Tech) in 1993, 1994, and 1999, respectively. He is currently a professor in the School of Electrical and Computer Engineering at Georgia Tech. Anderson's research interests include audio and psycho-acoustics, machine learning and signal processing in the context of human auditory characteristics, and the real-time application of such techniques. His research has included the development of a digital hearing aid algorithm that has now been made into a successful commercial product. Anderson was awarded the National Science Foundation CAREER Award for excellence as a young educator and researcher in 2004 and the Presidential Early Career Award for Scientists and Engineers in the same year. He has over 150 technical publications and 8 patents/patents pending. Anderson is a senior member of the IEEE, and a member the Acoustical Society of America, and Tau Beta Pi. He has been actively involved in the

Professor, School of Electrical and Computer Engineering
Phone
404.385.4979
Office
TSRB 543
Additional Research

Audio and Psycho-AcousticsBio-DevicesDigital Signal ProcessingLow-Power Analog/Digital/Mixed-Mode Integrated Circuits 

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Azad Naeemi

Azad Naeemi
azad@gatech.edu
ECE Profile Page

Azad Naeemi received his B.S. degree in electrical engineering from Sharif University, Tehran, Iran in 1994, and his M.S. and Ph.D. degrees in electrical and computer engineering from the Georgia Institute of Technology, Atlanta, Ga. in 2001 and 2003, respectively.

Prior to his graduate studies (from 1994 to 1999), he was a design engineer with Partban and Afratab Companies, both located in Tehran, Iran. He worked as a research engineer in the Microelectronics Research Center at Georgia Tech from 2004 to 2008 and joined the ECE faculty at Georgia Tech in fall 2008.

His research crosses the boundaries of materials, devices, circuits, and systems investigating integrated circuits based on conventional and emerging nanoelectronic and spintronic devices and interconnects. He is the recipient of the IEEE Electron Devices Society (EDS) Paul Rappaport Award for the best paper that appeared in IEEE Transactions on Electron Devices during 2007. He is also the first recipient of the IEEE Solid-State Circuits Society James D. Meindl Innovators Award (2022). He has received an NSF CAREER Award, an SRC Inventor Recognition Award, and several best paper awards at international conferences.

Professor, School of Electrical and Computer Engineering
Phone
404.894.4829
Office
Pettit/MiRC 216
Additional Research

Emerging nanoelectronic devices and circuitsSpintronic devices and interconnectsCarbon nanotube and graphene devices and interconnectsCircuit and system implications of emerging devicesDesign and optimization for nanoscale technologies

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Saibal Mukhopadhyay

Saibal Mukhopadhyay
saibal.mukhopadhyay@ece.gatech.edu
ECE Profile Page

Saibal Mukhopadhyay received the bachelor of engineering degree in electronics and telecommunication engineering from Jadavpur University, Calcutta, India in 2000 and the Ph.D. degree in electrical and computer engineering from Purdue University, West Lafayette, IN, in August 2006. He joined the faculty of the Georgia Institute of Technology in September 2007. Mukhopadhyay worked at IBM T. J. Watson Research Center, Yorktown Heights, N.Y. as research staff member from August 2006 to September 2007 and as an intern in summers of 2003, 2004, and 2005. At IBM, his research primarily focused on technology-circuit co-design methodologies for low-power and variation tolerant static random access memory (SRAM) in sub-65nm silicon technologies. Mukhopadhyay has (co)-authored over 90 papers in reputed conferences and journals and filed seven United States patents

Joseph M. Pettit Professor, School of Electrical and Computer Engineering
Phone
404.894.2688
Office
KL 2356
Additional Research

Low-power, variation tolerant, and reliable VLSI systemsDevice/circuit level modeling/estimation of power, yield, and reliabilityTechnology-circuit co-design methodologiesSelf-adaptive systems with on-chip sensing and repair techniqueMemory design for VLSI applicationsUltra-low power and fault-tolerant nanoelectronics: technology, circuit, and computing platforms

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Sung Kyu Lim

Sung Kyu Lim
limsk@ece.gatech.edu
ECE Profile Page

Sung Kyu Lim was born and grew up in Seoul, Korea, and moved to Los Angeles with his family at the age of 19. He received B.S. (1994), M.S. (1997), and Ph.D. (2000) degrees all from the Computer Science Department of University of California at Los Angeles (UCLA). During 2000-2001, he was a post-doctoral scholar at UCLA, and a senior engineer at Aplus Design Technologies, Inc. In August 2001, he joined the School of Electrical and Computer Engineering at Georgia Institute of Technology an assistant professor. He is currently the director of the GTCAD (Georgia Tech Computer Aided Design) Laboratory at the School. He recently released a CD with his rock band in Los Angeles and spends his leisure time writing/recording music

Professor, School of Electrical and Computer Engineering
Phone
404.894.0373
Office
Klaus 2360
Additional Research

Physical design automation for VLSI circuits3D circuit/packaging layout automationQuantum circuit layout automationMicro-architecture design space explorationLayout automation for reconfigurable circuitsGraph theory and combinatorial optimization

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Jennifer Hasler

Jennifer Hasler
jennifer.hasler@ece.gatech.edu
ECE Profile Page

Jennifer Hasler received her B.S.E. and M.S. degrees in electrical engineering from Arizona State University in August 1991. She received her Ph.D. in computation and neural systems from California Institute of Technology in February 1997. Hasler is a professor at the Georgia Institute of Technology in the School of Electrical and Computer Engineering; Atlanta is the coldest climate in which Hasler has lived. Hasler founded the Integrated Computational Electronics (ICE) laboratory at Georgia Tech, a laboratory affiliated with the Laboratories for Neural Engineering. Hasler is a member of Tau Beta P, Eta Kappa Nu, and the IEEE.

Professor, School of Electrical and Computer Engineering
Phone
404.894.2984
Office
TSRB 405
Additional Research

Analog-Digital Signal Processing / Mixed Signal integrated circuits (Systems on a chip)Scaling of deep submicron devicesFloating-gate devices, circuits, and systemsThe use of floating-gate MOS transistors to build "smart" interfaces for MEMS sensorsLow power electronicsAnalog VLSI models of on on-chip learning and Sensory processing in Neurobiology

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Abhijit Chatterjee

Abhijit Chatterjee
abhijit.chatterjee@ece.gatech.edu
ECE Profile Page

Abhijit Chatterjee is a professor in the School of Electrical and Computer Engineering at Georgia Tech and a Fellow of the IEEE. He received his Ph.D in electrical and computer engineering from the University of Illinois at Urbana-Champaign in 1990. Chatterjee received the NSF Research Initiation Award in 1993 and the NSF CAREER Award in 1995. He has received six Best Paper Awards and three Best Paper Award nominations. His work on self-healing chips was featured as one of General Electric 's key technical achievements in 1992 and was cited by the Wall Street Journal. In 1995, he was named a Collaborating Partner in NASA's New Millennium project. In 1996, he received the Outstanding Faculty for Research Award from the Georgia Tech Packaging Research Center, and in 2000, he received the Outstanding Faculty for Technology Transfer Award, also given by the Packaging Research Center. In 2007, his group received the Margarida Jacome Award for work on VIZOR: Virtually Zero Margin Adaptive RF from the Berkeley Gigascale Research Center (GSRC). Chatterjee has authored over 400 papers in refereed journals and meetings and has 20 patents. He is a co-founder of Ardext Technologies Inc., a mixed-signal test solutions company and served as chairman and chief scientist from 2000-2002. He is currently directing research in mixed-signal/RF design and test funded by NSF, SRC, MARCO-DARPA, and industry, and he served as chair of the VLSI Technical Interest Group at Georgia Tech from 2010-2012. He co-leads the Samsung Center of Excellence in High-Speed Test, established at Georgia Tech in 2011.

Professor, School of Electrical and Computer Engineering
Phone
404.894.1880
Office
Klaus 1352
Additional Research

VLSI and mixed-signal testingFault tolerant computingLow power circuit designComputer algorithmsDigital automation

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Muhannad S. Bakir

Muhannad S. Bakir
muhannad.bakir@mirc.gatech.edu
Integrated 3D Systems Group @ GT

Muhannad S. Bakir is the Dan Fielder Professor in the School of Electrical and Computer Engineering at Georgia Tech. He and his research group have received more than thirty paper and presentation awards including six from the IEEE Electronic Components and Technology Conference (ECTC), four from the IEEE International Interconnect Technology Conference (IITC), and one from the IEEE Custom Integrated Circuits Conference (CICC). Bakir’s group was awarded 2014 and 2017 Best Papers of the IEEE Transactions on Components Packaging and Manufacturing Technology (TCPMT). He is the recipient of the 2013 Intel Early Career Faculty Honor Award, 2012 DARPA Young Faculty Award, 2011 IEEE CPMT Society Outstanding Young Engineer Award, and was an Invited Participant in the 2012 National Academy of Engineering Frontiers of Engineering Symposium. Bakir is the co-recipient of the 2018 IEEE Electronics Packaging Society (EPS) Exceptional Technical Achievement Award "for contributions to 2.5D and 3D IC heterogeneous integration, with focus on interconnect technologies." He is also the co-recipient of the 2018 McKnight Foundation Technological Innovations in Neuroscience Awards. In 2020, Bakir was the recipient of the Georgia Tech Outstanding Doctoral Thesis Advisor Award.  
 
Bakir serves on the editorial board of IEEE Transactions on Components, Packaging and Manufacturing Technology (TCPMT) and IEEE Transactions on Electron Devices (TED). Dr. Bakir serves as a Distinguished Lecturer for IEEE EPS. 

Dan Fielder Professor, School of Electrical and Computer Engineering
Director, 3D Systems Packaging Research Center
Phone
404.385.6276
Office
Marcus 4135
Additional Research

Advanced cooling and power delivery for emerging system architecturesBiosensor technologies and their integration with CMOSElectrical and photonic interconnect technologiesHeterogeneous microsystem design and integration, including 2.5D and 3D ICs and packagingNanofabrication technologies

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Arijit Raychowdhury

Arijit Raychowdhury
arijit.raychowdhury@ece.gatech.edu
ECE Profile Page

Arijit Raychowdhury is currently an Professor in the School of Electrical and Computer Engineering at the Georgia Institute of Technology where he joined in January, 2013. He received his Ph.D. degree in Electrical and Computer Engineering from Purdue University (2007) and his B.E. in Electrical and Telecommunication Engineering from Jadavpur University, India (2001). His industry experience includes five years as a Staff Scientist in the Circuits Research Lab, Intel Corporation, and a year as an Analog Circuit Designer with Texas Instruments Inc. His research interests include low power digital and mixed-signal circuit design, design of power converters, sensors and exploring interactions of circuits with device technologies. Raychowdhury holds more than 25 U.S. and international patents and has published over 80 articles in journals and refereed conferences. He serves on the Technical Program Committees of DAC, ICCAD, VLSI Conference, and ISQED and has been a guest associate-editor for JETC. He has also taught many short courses and invited tutorials at multiple conferences, workshops and universities. He is the winner of the Intel Labs Technical Contribution Award, 2011; Dimitris N. Chorafas Award for outstanding doctoral research, 2007; the Best Thesis Award, College of Engineering, Purdue University, 2007; Best Paper Awards at the International Symposium on Low Power Electronic Design (ISLPED) 2012, 2006; IEEE Nanotechnology Conference, 2003; SRC Technical Excellence Award, 2005; Intel Foundation Fellowship, 2006; NASA INAC Fellowship, 2004; M.P. Birla Smarak Kosh (SOUTH POINT) Award for Higher Studies, 2002; and the Meissner Fellowship 2002. Raychowdhury is a Senior Member of the IEEE

Chair, School of Electrical and Computer Engineering
ON Semiconductor Professor, School of Electrical and Computer Engineering
Phone
404.894.1789
Office
Klaus 2362
Additional Research

Design of low power digital circuits with emphasis on adaptability and resiliencyDesign of voltage regulators, adaptive clocking, and power managementDevice-circuit interactions for logic and storageAlternative compute architectures

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Josiah Hester

Josiah Hester
josiah@gatech.edu
Personal Site

Josiah Hester works broadly in computer engineering, with a special focus on wearable devices, edge computing, and cyber-physical systems. His Ph.D. work focused on energy harvesting and battery-free devices that failed intermittentently. He now focuses on sustainable approaches to computing, via designing health wearables, interactive devices, and large-scale sensing for conservation. 
   
His work in health is focused on increasing accessibility and lowering the burden of getting preventive and acute healthcare. In both situations, he designs low-burden, high-fidelity wearable devices that monitor aspects of physiology and behavior, and use machine learning techniques to suggest or deliver adaptive and in-situ interventions ranging from pharmacological to behavioral. 
   
His work is supported by multiple grants from the NSF, NIH, and DARPA. He was named a Sloan Fellow in Computer Science and won his NSF CAREER in 2022. He was named one of Popular Science's Brilliant Ten, won the American Indian Science and Engineering Society Most Promising Scientist/Engineer Award, and the 3M Non-tenured Faculty Award in 2021. His work has been featured in the Wall Street Journal, Scientific American, BBC, Popular Science, Communications of the ACM, and the Guinness Book of World Records, among many others.

Interim Associate Director for Community-Engaged Research
Catherine M. and James E. Allchin Early Career Professor
Professor
Director, Ka Moamoa – Ubiquitous and Mobile Computing Lab
Office
TSRB 246
Ka Moamoa BBISS Initiative Lead Project—Computational Sustainability
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Helen Xu

Helen Xu
hxu615@gatech.edu
CoC Profile Page

Helen Xu comes to Georgia Tech from Lawrence Berkeley National Laboratory where she was the 2022 Grace Hopper Postdoctoral Scholar. She completed her Ph.D. at MIT in 2022 with Professor Charles E. Leiserson. Her main research interests are in parallel and cache-friendly algorithms and data structures. Her work has previously been supported by a National Physical Sciences Consortium fellowship and a Chateaubriand fellowship. She has interned at Microsoft Research, NVIDIA Research, and Sandia National Laboratories. 

Assistant Professor
Additional Research

Parallel ComputingCache-Efficient AlgorithmsPerformance Engineering

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