Zheng Receives 3rd Place Best Student Paper Award at International Microwave Symposium
Jun 30, 2022 — Atlanta, GA
Ting Zheng, a Ph.D. candidate in the Georgia Tech School of Electrical and Computer Engineering (ECE), has received the 3rd place Best Student Paper Award from IEEE International Microwave Symposium (IMS).
In Zheng’s paper entitled, “Fused-Silica Stitch-Chips with Compressible Microinterconnects for Embedded RF/mm-Wave Chiplets,” a fused-silica stitch-chip technology is proposed for seamless heterogeneous integration of commercial off-the-shelf (COTS) RF/mm-wave (radio frequency/millimeter)-wave chiplets. A chiplet is part of a processing module that allows manufacturers to use multiple smaller chips to make up a larger integrated circuit. Zheng’s proposed stitch-chips design has exhibited superior RF/mm-wave performance compared to conventional wire-bonds; stitch-chips directly interconnect two neighboring active die using low-loss and impedance optimized transitions thereby circumventing typical packaging losses and discontinuities. The technology features several other benefits, including compressible microinterconnects (CMIs), which are mechanically flexible off-chip I/Os (input/output) and are utilized to interface the stitch-chips with the COTS chiplets to enable unique assembly capabilities.
IMS’s Student Paper Competition is held every year to identify and recognize outstanding technical contributions from individual students. The symposium is the flagship event in a week dedicated to all things microwaves and RF. This year’s symposium was held 19-24 June 2022 in Denver, Colo., and also included the IEEE MTT-S Radio Frequency Integrated Circuits Symposium (RFIC) and the Automatic Radio Frequency Techniques Group (ARFTG).
Zheng is advised by Muhannad S. Bakir, Dan Fielder Professor in ECE. The Bakir lab has received more than 30 best publication awards, including six from the IEEE Electronic Components and Technology Conference (ECTC), four from the IEEE International Interconnect Technology Conference (IITC), one (best invited paper) from the IEEE Custom Integrated Circuits Conference (CICC), and two from the IEEE Transactions on Components Packaging and Manufacturing Technology (TCPMT).
His work is supported by the United States Air Force under Contract FA8650-20-C-1003, and performed in part at the Georgia Tech Institute for Electronics and Nanotechnology, a member of the National Nanotechnology Coordinated Infrastructure (NNCI), which is supported by the National Science Foundation under Grant ECCS-2025462.