Yu Wins Outstanding Paper Award at Electronic Components and Technology Conference

Shengtao Yu

Shengtao Yu won the Intel Outstanding Student Paper Award at the 2023 IEEE Electronic Components and Technology Conference (ECTC) in Orlando, Fla.

He presented his paper, “Scalable Fiber-Array-to-Chip Interconnections with Sub-Micron Alignment Accuracy,” at the conference in June 2023 and was recently notified of the outstanding paper recognition.

The paper explored co-packaged optics (CPO) for next generation AI and mm-wave electronic systems, which will require optical connectivity in very close proximity to the electronics.

“I got valuable technical feedback from the audience,” said Yu, a Ph.D. candidate in the School of Electrical and Computer Engineering. “I also learned more about the exciting trends in the packaging industry.”

His co-authors were his Ph.D. advisor Muhannad Bakir and co-advisor ECE Regents Professor Thomas Gaylord. Dr. Bakir also serves as the Interim Director of the GT 3D Systems Packaging Research Center (PRC).

The research presented innovative design and technology to enable the passive alignment and interconnection of an array of optical fibers to an underlying photonic integrated circuit (PIC). The key to the demonstrated technology is a passive silicon chiplet, which contains 3D printed slots for fiber insertion, that precisely self-aligns to an underlying PIC at sub-micron scale.

This has the potential to eliminate active alignment techniques commonly used in photonics packaging and enable a scalable and silicon-based solution to fiber alignment and coupling. Photonic interconnection between modern 2.5D packages with PICs and optical fibers is a current key bottleneck.

This work will potentially lead to improved and scalable CPO architectures, enabling massive off-package bandwidth and reduced energy consumption of interconnects in data centers, which will be important to meet the rapidly increasing packaging demands of artificial intelligence applications and beyond.

The work was supported by the United States Air Force under Contract FA8650-20-C-1003 and in part by the Georgia Tech Institute for Coordinated Infrastructure (NNCI), through the National Science Foundation under Grant ECCS-2025462.

Yu plans to continue this research in Dr. Bakir’s Integrated 3D Systems Group to create more robust and scalable designs that are compatible with the latest semiconductor technology.

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Zachary Winiecki