Nano@Tech Spring 2024 Series | Plenty of Room at the Top and Bottom
Featuring Suman Datta, Professor in the School of Electrical and Computer Engineering at Georgia Tech
Abstract: Advances in the theory of semiconductors in the 1930s coupled with the purification of germanium and silicon crystals in the 1940s enabled the point-contact junction transistor demonstration in 1947 and initiated the era of semiconductor electronics. Gordon Moore postulated that the number of components in an integrated circuit would double every two years with associated reduction in cost per transistor. Transistor density doubling through “scaling” with each new process node continues today, albeit at a slower pace. Scaling resulted in exponential gain in performance and energy efficiency of integrated circuits that has transformed computing from main-frames to personal computers, from mobile computing to cloud computing, from general purpose computing to domain specific computing. Innovations in new materials, transistor structures, cryogenic operation and design-technology co-optimization will continue transistor density scaling. Monolithic 3D integration and polylithic chiplet assembly will result in tight co-integration of memory on top of logic, whereas backside power delivery and power conversion technologies will exploit silicon asset beneath the logic transistor later. Together, these technologies will lead to continued advances in performance, energy efficiency and density of transistors in future microsystems.
Bio: Suman Datta, Joseph M Pettit Chair Professor at Georgia Tech and a GRA Eminent Scholar, was previously Stinson Chair Professor of Electrical Engineering at the University of Notre Dame and Professor of Electrical Engineering at The Pennsylvania State University. From 1999 to 2007, he led device R&D at Intel Corporation, contributing to several generations of high-performance logic transistors. His research group focuses on electronic devices for novel compute models. A Fellow of the IEEE and NAI, Datta has published 445+ papers and holds 186 semiconductor related US patents.
View a live stream of the seminar
A boxed lunch will be served on a first come, first served basis.
