The Georgia Tech School of Electrical and Computer Engineering (ECE) will be a significant contributor to overall success of the nation’s goal to increase domestic semiconductor production and solidify its microelectronics workforce as collaborative efforts by industry and government come into focus.

The School’s established partnership with the Semiconductor Research Corporation (SRC), in particular, will be key to the country’s long-term semiconductor competitiveness. As specific plans and investment opportunities continue to be developed, Dr. Todd Younkin, SRC’s CEO and President, visited the Georgia Tech campus in Atlanta on October 20-21. SRC is a world-renowned, high technology-based consortium that serves as a crossroads of collaboration between technology companies, academia, government agencies, and SRC’s highly regarded engineers and scientists.

“At this specific moment in time, when the county and world are committed to innovation in semiconductor technologies, it’s critically important to address our significant challenges strategically and collaboratively,” said Arijit Raychowdhury, the ECE Steve W. Chaddick School Chair. “Without the leadership of SRC, many challenges would go unmet. Having Todd on campus to meet with students, researchers, and leadership is fundamental to our future plans together.”

Younkin joined the ECE Advisory Board at the start of this fiscal year (July 1, 2022). At SRC he leads a ~$90 million per year global research agenda supported by over 3,000 academic and industrial researchers, 27 international companies, and three U.S. government agencies (DARPA, NIST, and NSF).

Currently Georgia Tech is a partner in SRC’s Joint University Microelectronics Program (JUMP). JUMP supports long-term research focused on high performance, energy efficient microelectronics for end-to-end sensing and actuation, signal and information processing, communication, computing, and storage solutions that are cost-effective and secure. The program, launched under the direction of Younkin in 2018, has six multi-university, multi-disciplinary innovation centers with 137 faculty, 749 students, and 412 industrial engineering liaisons.

“Georgia Tech offers a unique combination of expertise and collaborative spirit that is an important part of any SRC program.” Younkin said during his visit. “The faculty prepares future engineers to hit the ground running when they enter the semiconductor engineering workforce, either in academia or industry. This is crucial in the face of the rapid changes occurring in the microelectronics landscape today.”

Younkin also praised Georgia Tech’s unique fabrication and packaging facilities. Few universities can support the entire microelectronics stack – from materials and devices to packaging and systems – like Georgia Tech does.

Raheem Beyah, the dean of the College of Engineering and Southern Company Chair, and Chaouki T. Abdallah, executive vice president for research at Georgia Tech, met with Younkin during the visit. Additionally, Younkin was able to discuss ECE’s Opportunity Research Scholars’ Program (ORS), an innovative undergraduate research program designed to enhance and expand the academic experience of undergraduate students majoring in ECE, with academic professionals, faculty members, and the talented ORS student researchers.

On the afternoon of Oct. 20, Younkin participated in an ECE Panel Discussion with fellow Advisory Board member Roland Sperlich of Texas Instruments and Fernando Mujica of Apple Inc. The panel, moderated by ECE Professor Muhannad Bakir, attracted around 80 students. During the panel, Younkin expressed the demand for engineers with good communication skills and emphasized the importance of diversity.

“In order for companies to develop market-ready solutions, it’s crucial they are talking the same language,” said Younkin. “Additionally, the field needs to further prioritize diversity and inclusiveness. Achieving an inclusive workforce that unlocks the talents inherent in all of us requires increasing the participation of women and under-represented minorities, as well as striking a balance between American citizens and talented people coming from other nations.”

Last year, SRC and the Defense Advanced Research Projects Agency (DARPA) announced JUMP 2.0, a new long-term university research collaboration that will advance information and communication technologies (ICT) critical to the country’s economic growth and national security. The program signifies a new chapter in SRC’s history of public-private partnership with DARPA, leading semiconductor and ICT companies, and the defense industrial base.

Like its predecessor, JUMP 2.0 will work with researchers at outstanding U.S. universities – including Georgia Tech – to create collaborative, multidisciplinary research centers. SRC and DARPA look to announce the JUMP 2.0 research centers in early 2023.

Suman Datta has received the Test of Time Award at the 2022 IEEE Symposium on VLSI Technology and Circuits. Datta is the Joseph M. Pettit Chair in Advanced Computing in the Georgia Tech School of Electrical and Computer Engineering (ECE) and a Georgia Research Alliance Eminent Scholar.

Datta, who holds a joint appointment with the School of Materials Science and Engineering, was honored this year along with his co-authors and former colleagues at Intel Corporation for his 2006 research, “Tri-Gate Transistor Architecture with High-k Gate Dielectrics, Metal Gates and Strain Engineering.” True to its name, the Test of Time Award recognizes papers that have established their significance in history by standing the test of time. The goal of the award is to honor impactful papers and promote their recognition in the Symposia’s community.

As transistor gets smaller, it gets harder to switch off the transistor effectively. In response, Datta and his former Intel colleagues formulated the Tri-Gate transistor technology that was first introduced commercially at the 22-nm technology node. The transistor architecture has scaled to the 5-nm node and remains the workhorse of all leading-edge logic technology.

The research was the first experimental demonstration of high-performance NMOS and PMOS Tri-gate transistors in which the channel strain, high-k gate dielectric, gate electrode work functions, epitaxial source-drain regions were co-optimized together with the fin dimensions (width and height) and the fin shape (trapezoidal versus rectangular). The paper illustrated how to combine the electrostatic benefit of the fully-depleted nonplanar transistor structure with high-permittivity gate dielectric, work-function engineered metal gate electrodes and high- strain-engineered high-mobility channel to demonstrate high-performance CMOS transistors.

In addition to receiving the Test of Time Award at the symposium, Datta organized a short course on Monolithic and Heterogenous Integration and Advances in Application-Specific Computing Systems and Technologies. His research group presented three papers at the symposium on A Thousand State Superlattice Ferroelectric Field Effect Transistor Analog Weight Cell (with Professor Shimeng Yu); BEOL Compatible Ferroelectric Routers for Run-time Reconfigurable Compute-in-Memory Accelerators (with Professor Shimeng Yu) and Multi-bit per-cell 1T SiGe Floating Body RAM for Cache Memory in Cryogenic Computing (with Professor Arijit Raychowdhury).

Now in it’s 42nd year, the IEEE Symposium on VLSI Technology and Circuits is known as the microelectronics industry’s premiere international conference integrating technology, circuits, and systems. The 2022 symposium convened this year in Honolulu, Hawaii.

Zachary Engel has won the Best Student Oral Prize at the 2022 International Conference on Molecular Beam Epitaxy (ICMBE). Engel is a Ph.D. candidate in the Georgia Tech School of Electrical and Computer Engineering (ECE) and is part of ECE’s Advanced Semiconductor Technology Facility (ASTF) directed by Professor Alan Doolittle.

ICMBE recognized Engel for the quality of his work and presentation excellence on "Demonstration of Sc0.2Al0.8N HEMT structures with a sheet resistance of 150 Ω/□ and a sheet charge of 5.9x1013 cm-2 with phase pure, metal rich growth.”

The research presents new semiconductor chemistries that allow for improved semiconductor quality as demonstrated by a record sheet charge and channel resistance in a next generation replacement for the current champion of power and RF transistors, AlGaN/GaN transistors. This new device will allow 2.5 times higher current than present technologies. In principle, it can be integrated with ASTF’s groundbreaking aluminum nitride-based semiconductor, which previous demonstrations have shown to be the largest voltage semiconductor ever created.

This year’s ICMBE was held in Sheffield, United Kingdom from September 4-9. The conference began in 1978 in Paris, France and provides a prominent international forum for reporting new developments in the areas of fundamental and applied molecular beam epitaxy research, including advances in the technique, synthesis of new materials, discovery of new physical properties, formation of novel heterostructures, and the development of innovative devices.