Ümit V. Çatalyürek is currently a Professor and the Associate Chair of the School of Computational Science and Engineering in the College of Computing at the Georgia Institute of Technology. Prior joining Georgia Institute of Technology, he was a Professor and Vice Chair of the Department of Biomedical Informatics, and Professor in the Departments of Electrical & Computer Engineering, and Computer Science & Engineering at the Ohio State University. He received his Ph.D., M.S. and B.S. in Computer Engineering and Information Science from Bilkent University, Turkey, in 2000, 1994 and 1992, respectively. 

Dr. Çatalyürek is a Fellow of IEEE and SIAM. He was the elected Chair for IEEE TCPP for 2016-2019, and currently serves as Vice-Chair for ACM SIGBio for 2015-2021 terms. He also serves as the member of Board of Trustees of Bilkent University. 

He currently serves as the Editor-in-Chief for Parallel Computing. In the past, he also served on the editorial boards of the IEEE Transactions on Parallel and Distributed Computing Systems, the SIAM Journal of Scientific Computing, Journal of Parallel and Distributed Computing, and Network Modeling and Analysis in Health Informatics and Bioinformatics. He also serves on the program committees and organizing committees of numerous international conferences. 

A recipient of an NSF CAREER award, Dr. Çatalyürek is the primary investigator of several awards from the Department of Energy, the National Institute of Health, and the National Science Foundation. He has co-authored more than 200 peer-reviewed articles, invited book chapters and papers. His main research areas are in parallel computing, combinatorial scientific computing and biomedical informatics.

Siva is Fouts Family Early Career Professor and an Assistant Professor in the H. Milton Stewart School of Industrial & Systems Engineering at Georgia Tech.

Before joining Georgia Tech, he spent two years in the Stochastic Processes and Optimization group, which is part of the Mathematical Sciences Department at the IBM T. J. Watson Research Center. He received my Ph.D. in ECE from the University of Illinois at Urbana-Champaign in 2014 and was advised by Prof R. Srikant. Before that, he received an MS in ECE from UIUC, which was advised by Prof R. Srikant and Prof. Bruce Hajek. Maguluri also hold an MS in Applied Maths from UIUC. He obtained my B.Tech in Electrical Engineering from Indian Institute of Technology Madras.

Maguluri received the NSF CAREER award in 2021, 2017 Best Publication in Applied Probability Award from INFORMS Applied Probability Society, and the second prize in 2020 INFORMS JFIG best paper competition. Joint work with his students received the Stephen S. Lavenberg Best Student Paper Award at IFIP Performance 2021. As a recognition of his teaching efforts, Siva received the Student Recognition of Excellence in Teaching: Class of 1934 CIOS Award in 2020 for ISyE 6761 and the CTL/BP Junior Faculty Teaching Excellence Award, also in 2020, both presented by the Center for Teaching and Learning at Georgia Tech.

Richard (Rich) Vuduc is an Associate Professor at the Georgia Institute of Technology (“Georgia Tech”), in the School of Computational Science and Engineering, a department devoted to the study of computer-based modeling and simulation of natural and engineered systems. His research lab, The HPC Garage (@hpcgarage), is interested in high-performance computing, with an emphasis on algorithms, performance analysis, and performance engineering. He is a recipient of a DARPA Computer Science Study Groupgrant; an NSF CAREER award; a collaborative Gordon Bell Prize in 2010; Lockheed-Martin Aeronautics Company Dean’s Award for Teaching Excellence (2013); and Best Paper Awards at the SIAM Conference on Data Mining (SDM, 2012) and the IEEE Parallel and Distributed Processing Symposium (IPDPS, 2015), among others. He has also served as his department’s Associate Chair and Director of its graduate programs. External to Georgia Tech, he currently serves as Chair of the SIAM Activity Group on Supercomputing (2018-2020); co-chaired the Technical Papers Program of the “Supercomputing” (SC) Conference in 2016; and serves as an associate editor of both the International Journal of High-Performance Computing Applications and IEEE Transactions on Parallel and Distributed Systems. He received his Ph.D. in Computer Science from the University of California, Berkeley, and was a postdoctoral scholar in the Center for Advanced Scientific Computing the Lawrence Livermore National Laboratory.

Ling Liu is a Professor in the School of Computer Science at Georgia Institute of Technology. She directs the research programs in Distributed Data Intensive Systems Lab (DiSL), examining various aspects of large scale big data systems and analytics, including performance, availability, security, privacy and trust. Prof. Liu is an elected IEEE Fellow and a recipient of IEEE Computer Society Technical Achievement Award (2012). She has published over 300 international journal and conference articles and is a recipient of the best paper award from numerous top venues, including ICDCS, WWW, IEEE Cloud, IEEE ICWS, ACM/IEEE CCGrid. In addition to serve as general chair and PC chairs of numerous IEEE and ACM conferences in big data, distributed computing, cloud computing, data engineering, very large databases fields, Prof. Liu served as the editor in chief of IEEE Transactions on Service Computing (2013-2016), on editorial board of over a dozen international journals. Ling’s current research is sponsored primarily by NSF and IBM.

I am currently a Senior Research Scientist at Georgia Tech working in the School of Computer Science in the College of Computing since 2015. Previously, I have worked as as a research scientist in the School of Computational Science and Engineering (CSE) from 2013 to 2015. This work focused on advanced user support and benchmarking for the Keeneland project and investigating architecture-related research topics for Dr. Jeff Vetter’s Future Technologies Group at Oak Ridge National Lab.

With a background in computer architecture, my main research interests are focused on the intersection of high-performance computing and novel accelerators including GPUs, Xeon Phi, FPGAs, and Arm SVE processors. I am currently working on a collaborative research program for near-memory computing with High Bandwidth Memory (HBM) for processors and GPUs, SuperSTARLU, which is funded by the NSF. I am co-director of Georgia Tech’s Center for High Performance Computing, and I am also the director of a novel architecture testbed, the CRNCH Rogues Gallery, that aims to simplify and democratize access to novel post-Moore accelerators in the neuromorphic, reversible, and novel networking spaces.

I defended my PhD in August 2013 in the area of computer architecture working under Dr. Sudhakar Yalamanchili. More information on this networks- and memory-related research can be found under the publications tab.